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ESL design and verification : a prescription for electronic system-level methodology

紀錄類型:	書目-語言資料,印刷品 : 單行本
副題名:	a prescription for electronic system-level methodology
作者:	BaileyBrian, 1959-
合作者:	MartinGrant,
合作者:	PizialiAndrew.,
其他團體作者:	ScienceDirect (Online service)
出版地:	Amsterdam
出版者:	Morgan Kaufmann;
出版年:	c2007.
面頁冊數:	xxv, 462 p.ill. : 24 cm.;
集叢名:	The Morgan Kaufmann series in systems on silicon
標題:	Systems on a chip - Design and construction. -
標題:	Electronic books. -
電子資源:	http://www.loc.gov/catdir/enhancements/fy0707/2006103541-d.html
電子資源:	http://www.loc.gov/catdir/enhancements/fy0707/2006103541-d.html
電子資源:	http://www.loc.gov/catdir/enhancements/fy0707/2006103541-d.html
附註:	Electronic reproduction. Amsterdam : Elsevier Science & Technology, 2007.
摘要註:	Electronic System Level (ESL) design has mainstreamed it is now an established approach at most of the worlds leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with no links to implementation, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems. This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption. ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today. Visit the authors' companion site! http://www.electronicsystemlevel.com/ * Provides broad, comprehensive coverage not available in any other such book * Massive global appeal with an internationally recognised author team * Crammed full of state of the art content from notable industry experts.
ISBN:	0123735513
內容註:	CHAPTER 1 WHAT IS ESL? CHAPTER 2 TAXONOMY AND DEFINITIONS FOR THE ELECTRONIC SYSTEM LEVEL CHAPTER 3 EVOLUTION OF ESL DEVELOPMENT CHAPTER 4 WHAT ARE THE ENABLERS OF ESL? CHAPTER 5 ESL FLOW CHAPTER 6 SPECIFICATIONS AND MODELING CHAPTER 7 PRE-PARTITIONING ANALYSIS CHAPTER 8 PARTITIONING CHAPTER 9 POST-PARTITIONING ANALYSIS AND DEBUG CHAPTER 10 POST-PARTITIONING VERIFICATION CHAPTER 11 HARDWARE IMPLEMENTATION CHAPTER 12 SOFTWARE IMPLEMENTATION CHAPTER 13 USE OF ESL FOR IMPLEMENTATION VERIFICATION CHAPTER 14 RESEARCH, EMERGING AND FUTURE PROSPECTS APPENDIX: LIST OF ACRONYMS.

ESL design and verification : a prescription for electronic system-level methodology
Bailey, Brian

ESL design and verification : a prescription for electronic system-level methodology / Brian Bailey, Grant Martin, Andrew Piziali. - Amsterdam : Morgan Kaufmann, c2007.. - xxv, 462 p. ; ill. ; 24 cm.. - (The Morgan Kaufmann series in systems on silicon).
CHAPTER 1 WHAT IS ESL?.
Electronic reproduction. Amsterdam : Elsevier Science & Technology, 2007..
Includes bibliographical references and index..
ISBN 0123735513ISBN 9780123735515
Systems on a chip Electronic books. -- Design and construction.

Martin, Grant

ESL design and verification : a prescription for electronic system-level methodology
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